16 days old

SOC Design Engineering Graduate Trainee

Kulim, Kedah 09000
Job ID: JR0116817
Job Category: Intern/Student
Primary Location: Kulim, KDH MY
Other Locations:
Job Type: Intern

SOC Design Engineering Graduate Trainee

Job Description
In this position, the candidate will work with the R&D team who designs and develops the Chipset and SOC IPs for Intel latest product. Apart from performing SOC Front End related activities ranging from DFx RTL development, integration to verification using state of the art tools and methodology, the candidate also has the opportunity to drive for methodology and technology enhancements that spans across multiple geographies. Specific responsibilities include but not limited to:
-Involving in RTL logic design in System Verilog, Verilog or other Hardware description language
-Involving in capabilities building within and outside the SOC Front End team
-Validating the functionality of new architectural features of next generation designs by developing testplans, tests content, coverage points or test tools


- The applicant should have Bachelor/Master degree in Electrical & Electronics or Computer System.
- Knowledge in RTL integration and validation methodologies, preference given to those good in Verilog and C programming.
- Possesses strong analytical and debug skills.
- Ability to communicate well with counterparts and key stakeholders including cross site partners.

Inside this Business Group

The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.



Posted: 2019-09-04 Expires: 2019-10-12

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SOC Design Engineering Graduate Trainee

Kulim, Kedah 09000

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