5 days old

SOC Analog-Mixed Signal Design Engineer

Intel
Phoenix, AZ 85003
Job ID: JR0218174
Job Category: Engineering
Primary Location: Phoenix, AZ US
Other Locations: US, California, Santa Clara;US, Oregon, Hillsboro
Job Type: Experienced Hire

SOC Analog-Mixed Signal Design Engineer

Job Description

Key responsibilities:  Design, develop, modify and evaluate Analog and Mixed-signal integrated circuitry, components and other hardware systems.  Determine creative design approaches and parameters.  Conduct experimental tests and evaluate results.  Collaborate with internal and external customers, EDA vendors to develop and deliver high quality technology collaterals and models.

About the team:    You will be part of Intel’s Advanced Design Organization (AD) within Design Enablement (DE).  This team is focused on pathfinding and development of circuit technology that is best-in-.class.  The AD organization delivers critical technology and design collaterals to enable future product designs, develops the 1st chips for all new Intel technology nodes, and ensures process and design enablement are robust for high-volume product manufacturing.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.

Minimum qualifications:

  • MS 1+ year of professional experience, or a PhD degree in Electrical Engineering, Computer Engineering or related discipline.
  • Analog/Mixed Signal IC design and layout.
  • Digital RTL to GDS flows


Preferred qualifications:

  • Semiconductor device physics
  • Familiarity with one of more of the following EDA vendor’s tools : Cadence Virtuoso, Mentor Calibre or  ADS, Synopsys
  • RTL design(VHDL/Verilog), Synthesis, STA, APR, Physical verification DRC/LVS, and Extraction/Fill flows
  • Work experience in Unix or Linux,  and knowledge of one or more the following scripting languages: Python, Perl or TcL
  • Preference for Intel process technologies
Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.



Other Locations

US, California, Santa Clara;US, Oregon, Hillsboro


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

USExperienced HireJR0218174PhoenixTechnology and Manufacturing

Categories

Posted: 2022-05-13 Expires: 2022-06-12

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SOC Analog-Mixed Signal Design Engineer

Intel
Phoenix, AZ 85003

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