1+ months

Senior Principal Digital ASIC (RTL) Design Engineer

Northrop Grumman
Baltimore, MD 21217

RELOCATION ASSISTANCE: Relocation assistance may be available


TRAVEL: Yes, 10% of the Time


Join Northrop Grumman on our continued mission to push the boundaries of possible across land, sea, air, space, and cyberspace. Enjoy a culture where your voice is valued and start contributing to our team of passionate professionals providing real-life solutions to our worlds biggest challenges. We take pride in creating purposeful work and allowing our employees to grow and achieve their goals every day by Defining Possible. With our competitive pay and comprehensive benefits, we have the right opportunities to fit your life and launch your career today.

The EDIC group delivers full-custom ICs to provide the core functionality of our Advanced Multi function Sensor products. In support of that capability, we are seeking a **Senior Principal** **Digital ASIC RTL Design Engineer** for design and implementation of the digital content of these circuits using a top-down automated design flow.

Ideally the candidate would have experience of full custom ASIC design, but we would consider applicants with FPGA experience who would like to move into the IC field. The digital content of our chips is relatively small but growing so we need people who can take responsibility for the entire function from specification to production test. Must be comfortable working in a project team comprising multiple skil lsets while being accountable for their individual contribution.

**Basic Qualifications:**

+ Bachelor's degree in Electrical or Computer Engineering (other related disciplines could be considered with relevant practical experience)
+ 9 years of relevant experience with B.S. 7Years with Masters
+ Writing and Maintaining Design Specifications
+ RTL Coding using VHDL or Verilog languages
+ Design and coding of test benches to verify correct functionality
+ Familiarity with Cadence tools would be advantageous including but not limited to:
+ Xcelium for simulation and verification
+ Jasper or Conformal for Formal verification
+ Genus for synthesis
+ Tempus for static timing analysys
+ Eligible for a Secret or higher security clearance

**Preferred Qualifications:**

+ Delivery of multiple verified digital IC designs
+ Ability to understand system design requirements
+ Experience following a rigorous design process with checkpoint reviews
+ Strong Design automation skills
+ Current security clearance

Salary Range: $120,000.00 - $180,000.00

Employees may be eligible for a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.

**The health and safety of our employees and their families is a top priority** . The company encourages employees to remain up-to-date on their COVID-19 vaccinations. U.S. Northrop Grumman employees may be required, in the future, to be vaccinated or have an approved disability/medical or religious accommodation, pursuant to future court decisions and/or government action on the currently stayed federal contractor vaccine mandate under Executive Order 14042 https://www.saferfederalworkforce.gov/contractors/ .

Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit http://www.northropgrumman.com/EEO . U.S. Citizenship is required for most positions.


Posted: 2022-07-01 Expires: 2022-09-01

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Senior Principal Digital ASIC (RTL) Design Engineer

Northrop Grumman
Baltimore, MD 21217

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