1+ months

Pre-Silicon SOC Validation Lead/Engineer

Intel
Santa Clara, CA 95050
Job ID: JR0161228
Job Category: Engineering
Primary Location: Santa Clara, CA US
Other Locations: US, Oregon, Hillsboro;US, Texas, Austin
Job Type: Experienced Hire

Pre-Silicon SOC Validation Lead/Engineer

Job Description

Intel's Xeon Silicon Design (XSD) Organization is looking for an Pre-Silicon SOC Validation Lead/Engineer with expertise in Validation and/or Micro-architecture/Logic, as well as LV development methodologies. The candidate will be responsible for driving efficiencies in validation strategies for an SOC environment by taking a holistic view starting from planning, architecture, design, validation and production.

Your responsibilities will include but not be limited to:

  • SOC Verification and Validation strategies for future and tactical approaches for current generation to enable successful Tape-In with zero Post-Silicon Bugs.
  • Working with the RTL and Validation technical leads in a hands on fashion and help shape the next generation IP, Sus-System and SOC Validation methodologies and processes
  • Technical assessment of IP and feature asks and recommendations to management of the complexity and risk profiles.
  • Drive Logic and Validation methodologies as well as tool flows and future intercepts.
  • Provide technical assessment and interpretation as well as solutions to senior management of the technical risks in execution based on the wide range of IP/SOC LV technical indicators.
  • Proven track record of active engagement and technical delivery of high quality complex ASICs/SOCs or IPs across multiple design generations is required.
  • Have advanced understanding of the technical validation concepts, architecture, systems, development methods and disciplines associated with the program and utilize knowledge to accelerate the program's completion

The ideal candidate should exhibit the following behavioral traits:

  • Excellent written and verbal communication skills ability to communicate with customers & senior management.
  • Data-driven decision making and balanced approach to enable business objectives
  • Strong demonstration of ability to innovate.
  • Ability to work with teams across projects, domains and Geos.
  • Risk management
  • Self-starter, self-motivator, and highly adaptable


Qualifications

Minimum Qualifications

Must have a Bachelor's degree in Electrical/Electronics/Computer Engineering, Computer Science or related field with 12+ years of experience. OR a Master's degree with 8+ years of experience:

Your experience will be in the following:

  • Experience as a Verification/ Validation/ technical Lead
  • Pre-silicon verification experience with developing and maintaining complex SoC environments in OVM, UVM and SystemVerilog
  • Experience with Computer Architecture, Microarchitecture or pre-Si verification

Inside this Business Group

Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.



Other Locations

US, Oregon, Hillsboro;US, Texas, Austin



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USExperienced HireJR0161228Santa Clara

Categories

Posted: 2021-04-08 Expires: 2021-06-06

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Pre-Silicon SOC Validation Lead/Engineer

Intel
Santa Clara, CA 95050

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