16 days old

Design Verification Engineer

Job Id E1978793
Job Title Design Verification Engineer
Post Date 02/09/2020
Company - Division Qualcomm Technologies, Inc. - Corporate Engineering
Job Area Engineering - Verification
Location India - Noida
Job Overview Who we are: We are building Mid-Tier servers and innovating for the Edge markets A career in Corp R&D provides challenge, and opportunity for advancement than you can find from a typical job. As a member of our small, fast growing organization youll see the impact of your contributions each day. Do you have what it takes to be on our team? What we need: You have the right attitude, technical and interpersonal skills to make our product successful. You can work with architecture, design and verification teams competently and independently. You maintain attention to detail and determination to getting it right. You constantly think of the possibilities to innovate and excel, then work to make them reality. We dont expect you to have all the answers, but you have the initiative and resourcefulness that will help you get there quickly! What youll be doing: Design Verification in small project teams (blended on-shore / off-shore) delivering high impact, high visibility solutions Collaborating with IP/SS and SOC verification and design teams to discover and prioritize requirements Applying your analytical ability to design, innovative appropriate verification solutions Leading development and testing of components and functional slices of solutions Presenting on your projects and contributing to R&D efforts to share knowledge internally, attract recruits and be part of creating a great work environment
Minimum Qualifications Bachelor's degree in Engineering, Information Systems, Computer Science, or related field.
2+ years Hardware Engineering experience or related work experience.
Preferred Qualifications What youve already done: Worked as a Verification Engineer for at least 3 years Demonstrated your skills in the following areas oObject Oriented programming oHVL methodology (UVM, OVM) oTestbench automation oBug tracking oRegression mechanisms oVerification test planning oCoverage-driven verification closure oRelease methodology oRevision control systems oVerification strategies for directed testing oRandomization and assertions oIn-depth knowledge in SoC architecture, including CPU (preferably ARM), PCDDRx, peripherals (PCIe, Ethernet), and bus interconnect structures (AHB, AXI) Skills to Succeed: The right candidate will have a combination of following: General Skills Must: 3+ years experience in RTL design verification using System Verilog/UVM and industry-standard simulation tools Want: Experience with Perl, Python, or similar scripting language Detailed knowledge of ARM CPU architecture Detailed working knowledge of AMBA AHB &AXI protocols, PCIE and DDR Experience running Power Aware simulations Experience in L2/L3 cache verification Experience in cache and bus verification - Proficient with MOESI cache protocols on a coherent system bus and Bonus: Experience working on PCIE/ARM ordering rules
Education Requirements Required: Bachelor's, Electrical/Electronics/Computer Engineering
Preferred: Master's, Electrical/Electronics/Computer Engineering


Posted: 2020-02-10 Expires: 2020-03-11

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