27 days old

CPU Power Management Validation Engineer

Austin, TX 78701
Job ID: JR0161757
Job Category: Engineering
Primary Location: Austin, TX US
Other Locations:
Job Type: College Grad

CPU Power Management Validation Engineer

Job Description

Come join Intel's Atom CPU team in the DDG organization as a CPU Power Management Validation Engineer.

Job responsibilities include:

  • Development of CPU verification test bench, test plans, tests, coverage monitors/assertions and infrastructure
  • Debug failing tests in CPU simulation/emulation/silicon environment, then work with designers and architects to resolve bugs
  • Development of pre-Silicon power management functional validation tests to verify system will meet design requirements
  • Creating test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests
  • Analyzes and uses results to modify testing.


Minimum Requirements

The candidate must have a Bachelors of Science degree in Electric Engineering, Computer Science, or Computer Engineering and 5+ years of experience in/with:  - OR - a Masters degree in Electric Engineering, Computer Science, or Computer Engineering and 3+ years of experience in/with:

  • Validation on the CPU including experience in the area of power management validation 
  • CPU micro-architecture in areas such as out-of-order execution, power management, UPF, low power design, processor pipelines, Memory load and store, Cache Coherency, Paging etc
  • PreSi System Verilog RTL verification flow and environments, including test plans, test writing, and Coverage
  • CPU assembly, Verilog and/or System Verilog, OVM, hardware modeling, and Assertions

Preferred Qualifications

3+ years of experience in:

  • Closely related areas such as SOC power management subsystem design or validation.
  • Testbench architecture and hands-on development of components like BFMs, checkers, transactors, monitors and others using verification methodologies like System-Verilog VMM/OVM/UVM or equivalent
  • Independent debug of System Verilog RTL failures to root-cause functional bugs.
  • Directed or Constrained-Random test-writing skills
Inside this Business Group

The Devices Development Group (DDG) is a global organization focused on the development and integration of SOCs, critical IPs including Atom and chipsets that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USCollege GradJR0161757Austin


Posted: 2021-04-08 Expires: 2021-05-08

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CPU Power Management Validation Engineer

Austin, TX 78701

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